MC68000 Opcodes
LIST OF OPCODES FOR THE MC68000 PROCESSOR by Richard Karsmakers
Finally! I thought it would take ages before someone would come
up with a full list of opcodes for the 68000 processor, but Hans
de Lange recently supplied me with one, for which I hereby would
like to thank him very much. Now, everyone can use this
information in future times!
Remarks to this list:
This is only a simple list, that doesn't include clock cycle
times, etc. 'e' means a bit of the effective address field, 'd'
is an offset bit and 'x' stands for further variable bits.
Numbers preceeded by '$' are given in hexadecimal notation.
Please refer to our Machine Language course for the meaning of
individual instructions and addressing modes.
ORI.B $0 $0 00ee eeee
ORI.W $0 $0 01ee eeee
ORI.L $0 $0 10ee eeee
ORI to CCR $0 $0 $3 $C
ORI to SR $0 $0 $7 $C
BTST (dyn) $0 xxx1 00ee eeee
BCHG (dyn) $0 xxx1 01ee eeee
BCLR (dyn) $0 xxx1 10ee eeee
BSET (dyn) $0 xxx1 11ee eeee
MOVEP.W (M->R) $0 xxx1 $0 1xxx
MOVEP.W (M->R) $0 xxx1 $4 1xxx
MOVEP.W (R->M) $0 xxx1 $8 1xxx
MOVEP.L (R->M) $0 xxx1 $C 1xxx
ANDI.B $0 $2 00ee eeee
ANDI.W $0 $2 01ee eeee
ANDI.L $0 $2 10ee eeee
ANDI to CCR $0 $2 $3 $C
ANDI to SR $0 $2 $7 $C
SUBI.B $0 $4 00ee eeee
SUBI.W $0 $4 01ee eeee
SUBI.L $0 $4 10ee eeee
ADDI.B $0 $6 00ee eeee
ADDI.W $0 $6 01ee eeee
ADDI.L $0 $6 10ee eeee
BTST (stat) $0 $8 00ee eeee
BCHG (stat) $0 $8 01ee eeee
BCLR (stat) $0 $8 10ee eeee
BSET (stat) $0 $8 11ee eeee
EORI.B $0 $A 00ee eeee
EORI.W $0 $A 01ee eeee
EORI.L $0 $A 10ee eeee
EORI to CCR $0 $A $3 $C
EORI to SR $0 $A $7 $C
CMPI.B $0 $C 00ee eeee
CMPI.W $0 $C 01ee eeee
CMPI.L $0 $C 10ee eeee
MOVE.B $1 eeee eeee eeee
MOVEA.L $2 xxx0 01ee eeee
MOVE.L $2 eeee eeee eeee
MOVEA.W $3 xxx0 01ee eeee
MOVE.W $3 eeee eeee eeee
NEGX.B $4 $0 00ee eeee
NEGX.W $4 $0 01ee eeee
NEGX.L $4 $0 10ee eeee
MOVE from SR $4 $0 11ee eeee
CHK $4 xxx1 10ee eeee
LEA $4 xxx1 11ee eeee
CLR.B $4 $2 00ee eeee
CLR.W $4 $2 01ee eeee
CLR.L $4 $2 10ee eeee
NEG.B $4 $4 00ee eeee
NEG.W $4 $4 01ee eeee
NEG.L $4 $4 10ee eeee
MOVE to CCR $4 $4 11ee eeee
NOT.B $4 $6 00ee eeee
NOT.W $4 $6 01ee eeee
NOT.L $4 $6 10ee eeee
MOVE to SR $4 $6 11ee eeee
NBCD $4 $8 00ee eeee
SWAP $4 $8 $4 0xxx
PEA $4 $8 01ee eeee
EXT.W $4 $8 $8 0xxx
MOVEM.W (R->M) $4 $8 10ee eeee
MOVEM.L (R->M) $4 $8 11ee eeee
EXT.L $4 $8 $C 0xxx
TST.B $4 $A 00ee eeee
TST.W $4 $A 01ee eeee
TST.L $4 $A 10ee eeee
TAS $4 $A 11ee eeee
ILLEGAL $4 $A $F $C
MOVEM.W (M->R) $4 $C 10ee eeee
MOVEM.L (M->R) $4 $C 11ee eeee
TRAP $4 $E $4 xxxx
LINK $4 $E $5 0xxx
UNLK $4 $E $5 1xxx
MOVE to USP $4 $E $6 0xxx
MOVE from USP $4 $E $6 1xxx
RESET $4 $E $7 $0
NOP $4 $E $7 $1
STOP $4 $E $7 $2
RTE $4 $E $7 $3
RTS $4 $E $7 $5
TRAPV $4 $E $7 $6
RTR $4 $E $7 $7
JSR $4 $E 10ee eeee
JMP $4 $E 11ee eeee
ADDQ.B $5 xxx0 00ee eeee
ADDQ.W $5 xxx0 01ee eeee
ADDQ.L $5 xxx0 10ee eeee
ST $5 $0 11ee eeee
SF $5 $1 11ee eeee
SHI $5 $2 11ee eeee
SLS $5 $3 11ee eeee
SCC $5 $4 11ee eeee
SCS $5 $5 11ee eeee
SNE $5 $6 11ee eeee
SEQ $5 $7 11ee eeee
SVC $5 $8 11ee eeee
SVS $5 $9 11ee eeee
SPL $5 $A 11ee eeee
SMI $5 $B 11ee eeee
SGE $5 $C 11ee eeee
SLT $5 $D 11ee eeee
SGT $5 $E 11ee eeee
SLE $5 $F 11ee eeee
DBT $5 $0 $C 1xxx
DBF=DBRA $5 $1 $C 1xxx
DBHI $5 $2 $C 1xxx
DBLS $5 $3 $C 1xxx
DBCC $5 $4 $C 1xxx
DBCS $5 $5 $C 1xxx
DBNE $5 $6 $C 1xxx
DBEQ $5 $7 $C 1xxx
DBVC $5 $8 $C 1xxx
DBVS $5 $9 $C 1xxx
DBPL $5 $A $C 1xxx
DBMI $5 $B $C 1xxx
DBGE $5 $C $C 1xxx
DBLT $5 $D $C 1xxx
DBGT $5 $E $C 1xxx
DBLE $5 $F $C 1xxx
SUBQ.B $5 xxx1 00ee eeee
SUBQ.W $5 xxx1 01ee eeee
SUBQ.L $5 xxx1 10ee eeee
BRA $6 $0 dddd dddd
BSR $6 $1 dddd dddd
BHI $6 $2 dddd dddd
BLS $6 $3 dddd dddd
BCC $6 $4 dddd dddd
BCS $6 $5 dddd dddd
BNE $6 $6 dddd dddd
BEQ $6 $7 dddd dddd
BVC $6 $8 dddd dddd
BVS $6 $9 dddd dddd
BPL $6 $A dddd dddd
BMI $6 $B dddd dddd
BGE $6 $C dddd dddd
BLT $6 $D dddd dddd
BGT $6 $E dddd dddd
BLE $6 $F dddd dddd
MOVEQ $7 xxx0 xxxx xxxx
OR.B <ea>,Dn $8 xxx0 00ee eeee
OR.W <ea>,Dn $8 xxx0 01ee eeee
OR.L <ea>,Dn $8 xxx0 10ee eeee
OR.B Dn,<ea> $8 xxx1 00ee eeee
OR.W Dn,<ea> $8 xxx1 01ee eeee
OR.L Dn,<ea> $8 xxx1 10ee eeee
DIVU $8 xxx0 11ee eeee
SBCD Ds,Dd $8 xxx1 $0 0xxx
SBCD -(As),-(Ad) $8 xxx1 $0 1xxx
DIVS $8 xxx1 11ee eeee
SUB.B <ea>,Dn $9 xxx0 00ee eeee
SUB.W <ea>,Dn $9 xxx0 01ee eeee
SUB.L <ea>,Dn $9 xxx0 10ee eeee
SUB.B Dn,<ea> $9 xxx1 00ee eeee
SUB.W Dn,<ea> $9 xxx1 01ee eeee
SUB.L Dn,<ea> $9 xxx1 10ee eeee
SUBA.W $9 xxx0 11ee eeee
SUBA.L $9 xxx1 11ee eeee
SUBX.B Ds,Dd $9 xxx1 $0 0xxx
SUBX.W Ds,Dd $9 xxx1 $4 0xxx
SUBX.L Ds,Dd $9 xxx1 $8 0xxx
SUBX.B -(As),-(Ad) $9 xxx1 $0 1xxx
SUBX.W -(As),-(Ad) $9 xxx1 $4 1xxx
SUBX.L -(As),-(Ad) $9 xxx1 $8 1xxx
CMP.B $B xxx0 00ee eeee
CMP.W $B xxx0 01ee eeee
CMP.L $B xxx0 10ee eeee
CMPA.W $B xxx0 11ee eeee
CMPA.L $B xxx1 11ee eeee
EOR.B $B xxx1 00ee eeee
EOR.W $B xxx1 01ee eeee
EOR.L $B xxx1 10ee eeee
CMPM.B $B xxx1 $0 1xxx
CMPM.W $B xxx1 $4 1xxx
CMPM.L $B xxx1 $8 1xxx
AND.B <ea>,Dn $C xxx0 00ee eeee
AND.W <ea>,Dn $C xxx0 01ee eeee
AND.L <ea>,Dn $C xxx0 10ee eeee
AND.B Dn,<ea> $C xxx1 00ee eeee
AND.W Dn,<ea> $C xxx1 01ee eeee
AND.L Dn,<ea> $C xxx1 10ee eeee
MULU $C xxx0 11ee eeee
ABCD Ds,Dd $C xxx1 $0 0xxx
ABCD -(As),-(Ad) $C xxx1 $0 1xxx
EXG Dn,Dn $C xxx1 $4 0xxx
EXG An,An $C xxx1 $4 1xxx
EXG Dn,An $C xxx1 $8 1xxx
MULS $C xxx1 11ee eeee
ADD.B <ea>,Dn $D xxx0 00ee eeee
ADD.W <ea>,Dn $D xxx0 01ee eeee
ADD.L <ea>,Dn $D xxx0 10ee eeee
ADD.B Dn,<ea> $D xxx1 00ee eeee
ADD.W Dn,<ea> $D xxx1 01ee eeee
ADD.L Dn,<ea> $D xxx1 10ee eeee
ADDA.W $D xxx0 11ee eeee
ADDA.L $D xxx1 11ee eeee
ADDX.B Ds,Dd $D xxx1 $0 0xxx
ADDX.W Ds,Dd $D xxx1 $4 0xxx
ADDX.L Ds,Dd $D xxx1 $8 0xxx
ADDX.B -(As),-(Ad) $D xxx1 $0 1xxx
ADDX.W -(As),-(Ad) $D xxx1 $4 1xxx
ADDX.L -(As),-(Ad) $D xxx1 $8 1xxx
ASR.B (reg #) $E xxx0 $0 0xxx
ASR.W (reg #) $E xxx0 $4 0xxx
ASR.L (reg #) $E xxx0 $8 0xxx
ASR.B (reg) $E xxx0 $2 0xxx
ASR.W (reg) $E xxx0 $6 0xxx
ASR.L (reg) $E xxx0 $A 0xxx
ASL.B (reg #) $E xxx1 $0 0xxx
ASL.W (reg #) $E xxx1 $4 0xxx
ASL.L (reg #) $E xxx1 $8 0xxx
ASL.B (reg) $E xxx1 $2 0xxx
ASL.W (reg) $E xxx1 $6 0xxx
ASL.L (reg) $E xxx1 $A 0xxx
LSR.B (reg #) $E xxx0 $0 1xxx
LSR.W (reg #) $E xxx0 $4 1xxx
LSR.L (reg #) $E xxx0 $8 1xxx
LSR.B (reg) $E xxx0 $2 1xxx
LSR.W (reg) $E xxx0 $6 1xxx
LSR.L (reg) $E xxx0 $A 1xxx
LSL.B (reg #) $E xxx1 $0 1xxx
LSL.W (reg #) $E xxx1 $4 1xxx
LSL.L (reg #) $E xxx1 $8 1xxx
LSL.B (reg) $E xxx1 $2 1xxx
LSL.W (reg) $E xxx1 $6 1xxx
LSL.L (reg) $E xxx1 $A 1xxx
ROXR.B (reg #) $E xxx0 $1 0xxx
ROXR.W (reg #) $E xxx0 $5 0xxx
ROXR.L (reg #) $E xxx0 $9 0xxx
ROXR.B (reg) $E xxx0 $3 0xxx
ROXR.W (reg) $E xxx0 $7 0xxx
ROXR.L (reg) $E xxx0 $B 0xxx
ROXL.B (reg #) $E xxx1 $1 0xxx
ROXL.W (reg #) $E xxx1 $5 0xxx
ROXL.L (reg #) $E xxx1 $9 0xxx
ROXL.B (reg) $E xxx1 $3 0xxx
ROXL.W (reg) $E xxx1 $7 0xxx
ROXL.L (reg) $E xxx1 $B 0xxx
ROR.B (reg #) $E xxx0 $1 1xxx
ROR.W (reg #) $E xxx0 $5 1xxx
ROR.L (reg #) $E xxx0 $9 1xxx
ROR.B (reg) $E xxx0 $3 1xxx
ROR.W (reg) $E xxx0 $7 1xxx
ROR.L (reg) $E xxx0 $B 1xxx
ROL.B (reg #) $E xxx1 $1 1xxx
ROL.W (reg #) $E xxx1 $5 1xxx
ROL.L (reg #) $E xxx1 $9 1xxx
ROL.B (reg) $E xxx1 $3 1xxx
ROL.W (reg) $E xxx1 $7 1xxx
ROL.L (reg) $E xxx1 $B 1xxx
ASR (mem) $E $0 11ee eeee
ASL (mem) $E $1 11ee eeee
LSR (mem) $E $2 11ee eeee
LSL (mem) $E $3 11ee eeee
ROXR (mem) $E $4 11ee eeee
ROXL (mem) $E $5 11ee eeee
ROR (mem) $E $6 11ee eeee
ROL (mem) $E $7 11ee eeee
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